KiCad PCB Design: Student Guide

Every final-year electronics project goes through the same awkward adolescence: it works on a breadboard, it sort of works on a perfboard held together by hope and jumper wires, and then it needs to become a real PCB — something you can hand to an evaluator, mount in an enclosure, and trust on demo day. KiCad is the tool that gets you there: free, open-source, no license restrictions, and capable enough that professional hardware engineers use it daily.

This guide walks through a complete first PCB in KiCad (version 7/8): the workflow, schematic capture done properly, footprint assignment (where beginners lose the most time), board layout and routing rules that keep a 2-layer board reliable, DRC checks, Gerber generation, and ordering from Indian fab houses. Along the way you will build a concrete example — a small ESP32 sensor-node carrier board — so every abstract rule lands on a real decision. If you have not yet done the perfboard step, read the breadboard-to-PCB prototyping guide first; this guide starts where that one ends.

The KiCad workflow, end to end

A KiCad project flows in one direction, and understanding the direction saves hours:

Schematic → annotate → assign footprints → board layout → route → DRC → Gerbers → fab.

Concretely: you draw the circuit in the schematic editor; annotate gives every component a unique reference (R1, C3, U2); footprint assignment maps each schematic symbol to a physical package (that 10k resistor becomes an 0805 or a through-hole axial part); then you push the netlist into the PCB editor, arrange the footprints, route copper between them, run DRC (design rule check) until it is clean, and export Gerber files — the manufacturing artwork the fab house turns into a board.

Install KiCad from kicad.org (Windows, macOS, Linux all supported; on Ubuntu the PPA tracks newer releases). Launch the project manager, create a new project in its own folder, and open the schematic editor. One project = one folder; KiCad scatters several files per project, and mixing projects in one folder is a classic beginner mess.

Schematic capture: draw it like someone will read it

Your schematic is a document, not just an input to the router. Your evaluator, your guide, and future-you will read it. The habits that matter:

One clear signal flow: inputs on the left, outputs on the right, power at the top, ground at the bottom. This single convention makes any schematic readable.
Use net labels for bussed signals, not wires snaking across the sheet. A wire from the ESP32's TX pin across the page to a header is clutter; a net label ESP_TX at both ends is clean and electrically identical.
Every power pin gets decoupling shown explicitly. Do not hide it — draw the 100 nF capacitor next to the IC it serves. Reviewers check for this.
No-connect flags (X) on intentionally unused pins. An unconnected pin without a flag is ambiguous: did you forget it, or is it deliberate? The ERC (electrical rule check) will flag every unconnected pin; place the X marker on the ones you mean to leave open.
Power symbols, not wires, for rails. Use the +3V3 and GND power symbols everywhere instead of routing power as wires. It declutters the sheet enormously.

The example circuit: ESP32 sensor-node carrier

Our example board is deliberately modest — a carrier that an ESP32 dev board plugs into, with a sensor header, a regulator, and screw terminals for power. Modest is the right scope for a first PCB: every rule below is learnable on it, and a working board beats an ambitious failure.

The schematic blocks:

Power input: 2-pin screw terminal (7.5 V–12 V in) → AMS1117-3.3 regulator → 3V3 rail. Draw the regulator with its input/output capacitors: 10 µF electrolytic on input, 10 µF + 100 nF on output. The AMS1117 datasheet specifies output capacitance for stability — this is not optional decoration.
ESP32 headers: two rows of female headers matching the dev board pinout. Label the nets you actually use (3V3, GND, GPIO21/SDA, GPIO22/SCL, GPIO34/ADC).
Sensor header: 4-pin header (3V3, GND, SDA, SCL) for an I2C sensor module.
Status LED: LED + 330 Ω resistor on GPIO2, drawn with the resistor value on the schematic.

Run ERC (the ladybug icon) when the sheet looks complete. ERC catches: unconnected pins without no-connect flags, two outputs shorted together, power pins with no power source. Fix every error; warnings deserve a look but some (like unconnected hierarchical pins you do not use) can be consciously accepted. A schematic with red ERC errors is not ready for layout.

Annotate and assign footprints (the step beginners underestimate)

Annotate (the icon with R1→R?) assigns unique references. Use "annotate entire schematic" — done in one click.

Footprint assignment is where first PCBs die. The schematic symbol for a resistor says nothing about its physical size; you must choose: 0805 SMD, 0603 SMD, or axial through-hole. The decision table for a student board:

Factor	Choose SMD (0805/0603)	Choose through-hole
Hand-soldering skill	0805 is hand-solderable with a normal iron; 0603 needs a steadier hand	Easiest for absolute beginners
Board size	Smaller — everything packs tighter	Larger footprints, more drilling
Rework	Harder to remove without hot air	Easy to desolder and replace
Parts availability	Most modules and ICs are SMD anyway	Resistors/caps/LEDs widely available

The recommended student compromise: 0805 passives (big enough to hand-solder, small enough to look professional), through-hole for connectors, headers, screw terminals, and anything mechanical. Mixed assembly is completely normal.

The footprint traps to check, one by one, in the assignment tool:

Pin-1 orientation: verify the footprint's pin 1 matches your symbol's pin 1, especially for ICs, diodes, LEDs, and electrolytic capacitors. A mirrored SOT-223 regulator footprint will silently swap input and output — the board powers up wrong and the regulator dies.
The exact package variant: "SOT-23" has several incompatible pinouts and sizes; "0805" is imperial vs metric confusion territory (imperial 0805 = metric 2012). When in doubt, print the footprint 1:1 on paper and lay the physical part on it. This five-minute check has saved more boards than any other single habit.
Mounting holes and keepouts: add mounting holes (M3, 3.2 mm drill) at the board corners now, not after routing.

Board setup: stackup, grids, and design rules

Before placing a single part, configure the board:

Board outline: draw it on the Edge.Cuts layer — a rectangle with your mounting holes. Decide the size from the enclosure or the mounting constraints, not from how the routing feels later. Our example: 70 × 50 mm.
Layer stackup: 2 layers (F.Cu, B.Cu) is the default and the right choice for a first board. 4-layer boards are better electrically but cost more and teach you less about careful routing.
Design rules: Board Setup → Design Rules → Constraints. Indian fabs routinely handle 6 mil (0.15 mm) track/spacing as their standard low-cost capability; set minimum track width 0.25 mm and clearance 0.2 mm to stay comfortably inside what budget fabs produce reliably. Tighter rules buy you nothing on a first board and risk a fab rejecting or misproducing the job.
Track width by current (conservative, for 1 oz copper, ~10 °C rise — the IPC-2221-derived rule of thumb):

Current	Suggested track width
Signal (<100 mA)	0.25–0.3 mm
500 mA	0.5 mm
1 A	0.8–1.0 mm
2 A+	1.5 mm+, or pour a copper zone

Power traces (regulator input/output, motor rails) get the wide tracks; signal traces stay thin. When a high-current path needs to be wider than is convenient, use a copper pour/zone instead of a track.

Placement and routing: the rules that keep it working

Placement decides 80% of routing difficulty. Place first, route second:

Fix the connectors where the enclosure and cables demand them (power jack at the edge, sensor header accessible).
Place the regulator near the power input, with its capacitors immediately adjacent — the input/output caps must be close to the regulator pins, not three centimetres away across the board.
Place the ESP32 headers centrally with room around them (the dev board overhangs its headers).
Group related parts: LED and its resistor together, sensor header near the I2C pins it connects to.

Routing rules for a reliable 2-layer board:

Ground pour on the bottom layer. After routing signals, fill the bottom (and unrouted areas of the top) with a GND zone. A solid ground return is the single biggest signal-integrity win on a 2-layer board. Stitch the pours with vias every 15–20 mm so the two sides stay at the same potential.
Decoupling capacitors first, closest. The 100 nF cap on each power pin routes before anything else, with the shortest possible traces to the pin and to ground.
No right-angle (90°) bends — use 45° bends. (On a student 2-layer board this is mostly about manufacturability and habit, not RF voodoo — but build the habit now.)
Keep high-current loops small. The regulator input cap → regulator → output cap loop should be tight; large loops radiate and pick up noise.
Vias are fine, but each via is a small discontinuity — do not via-hop a sensitive analog signal five times across the board.
Silkscreen labels on every connector: "12V IN", "SENSOR", pin-1 dots, +/− markings. The board you cannot wire up without the schematic is a board that fails its demo.

Route in passes: power and ground first, then critical signals (crystal, I2C, ADC), then everything else. Expect to rip up and re-route sections — that is normal, not failure.

DRC: the check that stands between you and a coaster

Run DRC (the ladybug-with-checkmark icon in the PCB editor) and fix every error. DRC checks your configured rules: track-to-track clearance, track-to-pad, unconnected nets, missing ground connections, silkscreen overlapping pads. Common first-board DRC errors:

DRC error	What it means	Fix
Clearance violation	Two copper features too close	Move them apart or neck the track down between pads
Unconnected items	A net has pads with no copper between them	Finish the route — often a forgotten via or a pour that needs refilling (press B)
Starved thermal relief	A pad in a copper zone cannot be soldered properly	Check zone connection settings; usually fine, but verify the pad is actually connected
Silkscreen overlap	Reference designator on top of a pad	Move the silkscreen text
Missing courtyard overlap	Footprints overlapping	Separate the parts

After DRC is clean, do the paper print test: print the top and bottom copper layers at 1:1 scale, lay your physical components (ESP32 dev board, regulator, terminals) on the paper. If a header does not land on its pads on paper, it will not on the real board. Then review the 3D view (Alt+3) — it renders the board with components and catches absurdities like a tall electrolytic under where the ESP32 board sits.

Generating Gerbers and ordering

Plot (File → Fabrication Outputs → Gerbers): include F.Cu, B.Cu, F.Mask, B.Mask, F.Silkscreen, B.Silkscreen, Edge.Cuts. Generate the drill files (Excellon format) in the same dialog — forgetting drill files is the classic first-order mistake. Zip everything and check the zip with a free Gerber viewer (gerbv, or an online viewer) before uploading: confirm the outline is present, drills align with pads, and the board looks like your design.

Ordering from Indian fabs (LionCircuits in Bengaluru, PCB Power, and similar houses) typically works like this: upload the Gerber zip, pick 2-layer, 1 oz copper, HASL or ENIG finish (HASL is cheaper and fine for hand soldering), green solder mask, 1.6 mm thickness, and your quantity (panels of 5–10 are the economical student choice). Lead times of roughly a week plus shipping are normal; plan the PCB order at least three weeks before your demo — the board will need assembly, testing, and at least one round of fixes.

Budget reality: a small 2-layer student board in a 5–10 piece panel from an Indian fab usually costs a few hundred rupees plus shipping — comfortably inside a final-year budget. The expensive mistakes are re-spins: every error the DRC and the paper test catch is a re-spin you do not pay for.

Assembling the first board

Order a stencil if you used many SMD parts (many fabs offer one cheaply with the board); otherwise hand-solder 0805s with a normal iron, fine solder, and tweezers — drag-soldering works for ICs. Assembly order: SMD passives first, then ICs, then through-hole parts, then connectors and mechanicals last. Power it up the first time through a current-limited bench supply set to 100–200 mA: if the supply hits current limit immediately, you have a short — power off and find it with a multimeter before anything smoulders. An adjustable DC bench power supply with a digital display is exactly the tool for this moment.

First-power checklist: regulator output at 3.3 V (±5%), no hot components (touch test after 30 seconds — warm is fine, hot is not), ESP32 dev board boots when plugged in, sensor header shows 3.3 V and clean I2C pull-ups. Only then write the firmware that uses the board.

Where a custom PCB changes a project

A fabricated PCB is not just tidier than a perfboard — it changes what the project can credibly claim: stable power distribution, proper grounding, and connectors that survive handling. It is the difference reviewers notice between a prototype and a product. Consider it for any project with more than a handful of connections, and definitely for anything with analog sensing or motor power — a YOLO-based PCB defect detection setup is, fittingly, a project that inspects exactly the kind of boards this guide teaches you to make.

First-PCB checklist

Schematic follows signal-flow conventions; ERC is clean.
Every footprint verified — 1:1 paper print checked against physical parts, pin-1 orientations confirmed.
Design rules set to ≥0.25 mm track / 0.2 mm clearance; power tracks sized by current.
Decoupling caps adjacent to every power pin; ground pour on bottom with via stitching.
DRC clean; 3D view reviewed; paper print test passed.
Gerbers + drill files generated and visually verified in a Gerber viewer.
Ordered at least 3 weeks before demo; assembly plan and current-limited first power-up ready.

KiCad rewards the boring virtues: check the footprint, run the DRC, print the paper. Do those three things and your first board will very likely work — which puts you ahead of most first attempts. For the soldering that follows, the prototyping guide covers technique, and the Electronics project ideas collection has builds worth giving a proper PCB.

The first-board mistake gallery (learn from other people's coasters)

These are the errors that turn a first PCB order into drink coasters, ranked by how often they happen:

Mirrored footprint. The regulator's input and output swapped because the footprint's pin 1 did not match the symbol's. Prevention: the 1:1 paper print test, every time, for every IC.
Wrong drill size for a connector. The screw terminal's pins do not fit the holes. Prevention: check the drill column in the footprint properties against the part's datasheet — "2.54 mm pitch" describes spacing, not hole size.
No mounting holes / board does not fit the enclosure. Designed the circuit, forgot the mechanical reality. Prevention: draw the outline and mounting holes before placing parts; confirm against the enclosure early.
Forgot the drill files. The fab emails back asking for them; a week lost. Prevention: the ordering checklist below.
Copper under a metal-can crystal or USB shell shorting. A ground pour touching a component body that is not insulated. Prevention: keepout zones under metal-bodied parts; check the 3D view.
Silkscreen over pads. Reference designators printed on copper that should be soldered. Prevention: DRC flags this — which is why DRC must be clean, not "mostly clean".
Power and ground swapped on a hand-drawn symbol. You drew the regulator symbol yourself and mirrored it. Prevention: use KiCad's stock symbols wherever they exist; verify custom symbols twice.
Ordered 10 boards of an untested design — and it has a mistake. Prevention: for a first board, the minimum order quantity is fine; just accept that a re-spin is likely and keep the design simple enough that a re-spin is cheap.

Version control and documentation for hardware

Put the KiCad project folder in git from day one (the Git and GitHub guide covers the workflow). Commit the schematic, PCB, and footprint libraries; a .gitignore for the autosave and backup files keeps the repo clean. Tag the commit you sent to the fab (git tag fab-v1) — when the boards arrive with a mistake, you need to know exactly which files produced them.

Two documentation outputs earn their keep in the project report: plotted PDFs of the schematic (File → Plot → PDF in the schematic editor — vector, zoomable, report-ready) and the 3D render (exported as an image from the 3D viewer). Both take seconds to produce and both make the report look like the work of someone who builds hardware deliberately. The fabrication outputs (Gerbers) go in the repo too — a future student should be able to re-order your board from your repository alone.

Ordering checklist (tape this to your monitor)

Gerbers plotted: F.Cu, B.Cu, F.Mask, B.Mask, F.Silkscreen, B.Silkscreen, Edge.Cuts.
Drill files generated (Excellon), plated and non-plated holes confirmed.
Zip verified in a Gerber viewer: outline present, drills on pads, layers aligned.
Board thickness 1.6 mm, 1 oz copper, HASL finish, solder mask colour chosen.
Quantity and lead time confirmed; order placed ≥3 weeks before the demo.
Stencil ordered if the board has more than a handful of SMD parts.
Schematic PDF and 3D render exported for the report; fab files tagged in git.

KiCad PCB Design for Students: Schematic, Footprints, Routing, DRC and Gerbers for Indian Fabs